| Hint | Answer | % Correct |
|---|---|---|
| Add with carry | ADC | 100%
|
| + | ADD | 100%
|
| & | AND | 100%
|
| Branch | B | 100%
|
| Bit Clear | BIC | 50%
|
| Branch with Link | BL | 50%
|
| Branch and Exchange | BX | 50%
|
| Compare Negative | CMN | 50%
|
| Compare | CMP | 50%
|
| Exclusive OR | EOR | 50%
|
| Load coprocessor from memory | LDC | 50%
|
| Load multiple registers | LDM | 50%
|
| Load register from memory | LDR | 50%
|
| Move register or constan | MOV | 50%
|
| Multiply | MUL | 50%
|
| Move negative register | MVN | 50%
|
| or | ORR | 50%
|
| Reverse Subtract | RSB | 50%
|
| Subtract with Carry | SBC | 50%
|
| Store coprocessor register to memory | STC | 50%
|
| Store Multiple | STM | 50%
|
| Store register to memory | STR | 50%
|
| Subtract | SUB | 50%
|
| Swap register with memory | SWP | 50%
|
| Test bits | TST | 50%
|
| Coprocesor Data Processing | CDP | 0%
|
| Move CPU register to coprocessor register | MCR | 0%
|
| Multiply Accumulate | MLA | 0%
|
| Move from coprocessor register to CPU register | MRC | 0%
|
| Move PSR status/flags to register | MRS | 0%
|
| Move register to PSR status/flags | MSR | 0%
|
| Reverse Subtract with Carry | RSC | 0%
|
| Software Interrupt | SWI | 0%
|
| Test bitwise equality | TEQ | 0%
|